We are looking for experienced Pre-Silicon Emulation Engineers to join our client's growing team. The ideal candidate will have hands-on experience in emulation tools, design verification methodologies, and a deep understanding of SoC or ASIC-based system modeling. You will work closely with cross-functional teams to accelerate hardware-software co-verification and system validation in the pre-silicon phase.

Key Responsibilities:

Develop and execute emulation-based verification strategies for complex systems and SoCs.

Work with emulation platforms such as Palladium, Zebu, and Veloce.

Model and simulate systems using SystemC, C/C++, and TLM 2.0.

Collaborate with design and verification teams to identify issues early in the development cycle.

Support integration of hardware and software components for system-level validation.

Contribute to test plan development, debug failures, and drive closure.

Requirements:

Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field.

4–8 years of experience in Emulation and Design Verification.

Proficiency with emulation tools like Cadence Palladium, Synopsys Zebu, or Mentor Veloce.

Hands-on experience with SystemC, C/C++, and UVM-SystemC.

Strong understanding of SoC/ASIC design, hardware/software co-verification, and industry standards.

Experience in modeling, simulation, and verification of embedded systems or complex hardware architectures.

Excellent problem-solving, communication, and collaboration skills.

Detail-oriented with a quality-first approach.

Preferred Qualifications:

Experience in pre-silicon validation of multi-core systems or hardware accelerators.

Exposure to RTL design and FPGA prototyping is a plus.