We have immediate openings for two critical positions: Design Verification Senior / Lead Role, these are urgent requirements, and we are seeking highly qualified candidates who can join our team as soon as possible.

Below are the job details:

Job Title: Design verification Senior/ Lead Role

Location: Bangalore

Job Type: Full-Time

Payroll: Direct Payroll

Experience: 5 to 10 Years

Job Summary:

We are looking for highly skilled RTL Verification Leads and Managers to join our motivated verification team. The selected candidates will play key roles in IP verification, with a focus on protocols such as UCIe, HBM, PCIe, AXI/ACE, Ethernet, DDR, and more. This position requires deep expertise in advanced verification methodologies and a strong background in RTL verification.

Key Responsibilities:

• Lead and execute RTL verification tasks for IPs like UCIe, HBM, PCIe, and Bus Logic.
• Implement advanced verification methodologies such as UVM/OVM/VMM/SystemVerilog.
• Generate constrained random stimulus and perform assertion-based verification and functional coverage.
• Oversee register verification standards and manage NLP/GLS verification flows.
• Conduct IP and sub-system level verification for protocols including PCIe, UCIe, and HBM.
• Facilitate controller interoperability testing at the sub-system level.
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Qualifications:

• BE/ME/MTech/MS in Electrical Engineering or a related field.
• 6 to 12 years of RTL verification experience.
• Proficiency in UVM/OVM/VMM/SystemVerilog.
• Strong knowledge of constrained random stimulus generation, assertion-based verification, and functional coverage techniques.
• Experience with register verification standards and NLP/GLS verification flows.
• Hands-on experience in IP and sub-system level verification for protocols like PCIe, UCIe, and HBM is a strong plus.
• Prior experience in controller interoperability testing at the sub-system level is desirable.